An electronic component package refers to package technology for electrically connecting an electronic component to a printed circuit board (PCB), such as a main board of an electronic device, and protecting the electronic component from external impacts. Recently, one major trend of technical development regarding electronic components is reducing a size of components, and in line with this, in a package field, electronic components having a reduced size while retaining a plurality of pins are required to meet the rapid demand for miniaturized electronic components.
A wafer level package (WLP) using a redistribution line (RDL) of an electrode pad of an electronic component formed on a wafer has been proposed as a package technique to meet the aforementioned technical requirements. The WLP includes a fan-in WLP and a fan-out WLP, and in particular, the fan-out WLP, advantageous for realizing a plurality of pins with a reduced size, has been actively developed in recent years.
Meanwhile, when such a package is manufactured, an electrical test is required to determine whether the package is defective or not. Conventionally, the electrical test is generally performed after an electronic component such as an integrated circuit (IC) chip is mounted in the package. However, in a case in which an electrical test is performed with the electronic component mounted in the package and the package is determined to be defective, even the electronic component, in addition to a wiring layer forming the package, may have to be discarded, creating significant loss for manufacturers.